CMOS RF Integrated Circuit Reliability Studies For Ultra-Thin Flexible Packaging

Abstract

For the first time, this Report introduces RF compatibility studies for the next-generation wireless communication processes requiring compatible body systems, in the form of fully integrated CMOS RF integrated circuits, where wireless Communication RFICs are integrated in ultra-thin compact packets. As the test case, the RF properties of a various die substrate thickness CMOS (VCO) chip were determined and the results were analysed. The studied CMOS VCO chip has been developed and manufactured using the RF-CMOS 180 nm method. The reliability of VCO chips efficiency is characterised and the results comparable between 250 and 50, 35 and 25 μm are correlated before and after diet. The study shall take account of critical RF efficiency parameters, such as oscillation frequency, output power and phase ring. All die-cells are positioned face-up in the micro chamber of the probe station to be sampled on a metal chuck with connector. Due to the effects on the diminishing diet, the phase noise degradation is seen significantly when the variations in frequency and output power are ±1% and ±1 dB respectively. The very well fact of phase noise sensitivity to the thickness of the substrate due to leakage supports this and SOI CMOS is commonly debated in order to mitigate this parasite.