Design and Analysis of systolic Array for Convolution Neural Networks
Main Article Content
Abstract
Convolutional neural networks (CNN) are used in many functions mainly Digital signal processing (DSPs), Networking, Image and video classification for its accuracy. CNNs need huge estimation and support. To fix hardware, Convolutional neural network accelerators required to be enhanced to bring down size of the memory, resource utilization and power usage. In this paper, the systolic array with Multiply-Accumulate unit (MAC) is designed. The input image of 128x128 size is considered and processed through main memory to systolic array. The systolic array performs the MAC unit operations rows and columns wise. The work is carried out using Xilinx ISE 14.7 environment and synthesised on Artix-7 FPGA.
Downloads
Metrics
Article Details
Licensing
TURCOMAT publishes articles under the Creative Commons Attribution 4.0 International License (CC BY 4.0). This licensing allows for any use of the work, provided the original author(s) and source are credited, thereby facilitating the free exchange and use of research for the advancement of knowledge.
Detailed Licensing Terms
Attribution (BY): Users must give appropriate credit, provide a link to the license, and indicate if changes were made. Users may do so in any reasonable manner, but not in any way that suggests the licensor endorses them or their use.
No Additional Restrictions: Users may not apply legal terms or technological measures that legally restrict others from doing anything the license permits.