Data transfer optimization in CPU/GPGPU Communication
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Abstract
The objective of this paper is to make data transfers efficient. The performance characteristics of various data transfer methods in GPGPU computing are presented in this paper. In GPGPU computing, for the data transfer between the host (CPU) and the device (GPGPU), the performance in terms of bandwidth requirement and latency is discussed for the pageable and pinned memory mechanism. The result shows that the data transfer latency gets reduced in pinned memory mechanisms as compared to pageable memory mechanisms. It is also seen that there is significant optimization in the results by concurrently running data transfer among the host - device and kernel execution.
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