BCD ADDER ENTERPRISE EXHAUSTING NOVEL REVERSIBLE LOGIC FOR STUMPY POWER APPLICATIONS
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Abstract
Reversible logic has garnered tremendous attention in the recent years owing to its capacity to lower the power dissipation which is the major criterion in low power digital design. It finds use in many fields, including nanotechnology, biotechnology, quantum computing, optical information processing, DNA computing, and advanced computing. This work introduces a novel reversible gate and uses it to create an improved reversible BCD adder. The suggested architecture is shown to be more efficient than current ones in terms of gate count, garbage output count, and quantum cost, according to a comparison result.
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References
Sayem ASM, Ueda M. Optimization of reversible Sequential Circuits. Journal of Computing. 2010 Jun; 2(6):208–
Bennett CH. Logical Reversibility of Computation. IBM Journal of Research and Development; 1973 Nov. p.
– 32. Crossref
Landauer R. Irreversibility and Heat Generation in the computational Process. IBM Journal of Research and
Development. 1961 Jul; 5(3):183–91. Crossref
Kanth BR, Krishna BM, Sridhar M, Swaroop VGS. A distinguish between reversible and conventional logic gates.
International Journal of Engineering Research and Applications. 2012 Mar-Apr; 2(2):148–51.
Mamataj S, Das S, Rahaman A. An Approach for Realization of 2s Complement Adder Substractor using DKG
reversible gate. International Journal of Emerging Technology and Advanced Engineering. 2013 Dec; 3(12):205–9.
Babu HMH, Islam MR, Chowdhury AR, Chowdhury SMA.Synthesis of full-adder circuit using reversible
logic17th InternationalConference on VLSI Design; 2004. p. 757–60.
Biswas AK, Hasan M, Hasan M, Chowdhury AR, Md H, Babu H. A Novel Approach to Design BCD Adder and
Carry Skip BCD Adder. 21st International Conference on VLSI Design; 2008. p. 566–71.
Thapliyal H, Ranganathan N. Design of reversible sequential circuits optimizing quantum cost delay and
garbageoutputs. ACM Journal of Emerging Technologies in Computing Systems. ACM. New York, USA. 2010 Dec;
(4).
Mamataj S, Das B, Rahaman A. A More Effective Realization of BCD Adder by using a new Technique Reversible
logic BBCDC. International Journal of Computational Engineering Research. 2015 Feb; 4(2):13–9.
Suria ST, Jenath M. Design and Implementation of CLA Using reversible Logic Gates. International Journal of
Innovative Research in Science Engineering and Technology. 2016 May; 5(5):2347–6710.
Kumbala Pradeep Reddy; Sarangam Kodati; Thotakura Veeranna; G. Ravi, "6 Machine Learning-Based
Intelligent Video Analytics Design Using Depth Intra Coding," in Big Data Management in Sensing: Applications in
AI and IoT , River Publishers, 2021, pp.77-86.
G. Ravi; Kumbala Pradeep Reddy; M. Mohan Rao; Sarangam Kodati; J. Praveen Kumar, "10 Design a Novel
IoT-Based Agriculture Automation Using Machine Learning," in Big Data Management in Sensing: Applications in
AI and IoT , River Publishers, 2021, pp.149-158.
Reddy, Kumbala Pradeep, Sarangam Kodati, Madireddy Swetha, M. Parimala, and S. Velliangiri. "A hybrid
neural network architecture for early detection of DDOS attacks using deep learning models." In 2021 2nd
International Conference on Smart Electronics and Communication (ICOSEC), pp. 323-327. IEEE, 2021.
Kodati, Sarangam, et al. "Analysis of Heart Disease Data Using K-Means Clustering Algorithm in Orange
Tool." Intelligent Manufacturing and Energy Sustainability: Proceedings of ICIMES 2020. Springer Singapore, 2021.
Reddy, Kumbala Pradeep, Gullipalli Apparao Naidu, and Bulusu Vishnu Vardhan. "View-Invariant Feature
Representation for Action Recognition under Multiple Views." International Journal of Intelligent Engineering &
Systems 12.6 (2019).
Pradeep Reddy, K., T. Raghunadha Reddy, G. Apparao Naidu, and B. Vishnu Vardhan. "Term weight measures
influence in information retrieval." Int J Eng Technol 7, no. 2 (2018): 832-836.
Ramesh, A., Reddy, K. P., Sreenivas, M., & Upendar, P. (2022, April). Feature Selection Technique-Based
Approach for Suggestion Mining. In Evolution in Computational Intelligence: Proceedings of the 9th International
Conference on Frontiers in Intelligent Computing: Theory and Applications (FICTA 2021) (pp. 541-549). Singapore:
Springer Nature Singapore.
Kodati, Sarangam, Kumbala Pradeep Reddy, Sreenivas Mekala, PL Srinivasa Murthy, and P. Chandra Sekhar
Reddy. "Detection of Fake Profiles on Twitter Using Hybrid SVM Algorithm." In E3S Web of Conferences, vol. 309,
p. 01046. EDP Sciences, 2021.
Kodati, Sarangam, Kumbala Pradeep Reddy, Thotakura Veerananna, S. Govinda Rao, and G. Anil Kumar.
"Security Framework Connection Assistance for IoT Device Secure Data communication." In E3S Web of
Conferences, vol. 309, p. 01061. EDP Sciences, 2021.
Reddy, Kumbala Pradeep, C. Ramakrishna, Anusha Vangala, and V. Shiva Kumar. "A secure collaborative
machine learning assisted channel based homomorphic encryption and decryption network." In AIP Conference
Proceedings, vol. 2548, no. 1. AIP Publishing, 2023.
Reddy, Kumbala Pradeep, M. Parimala, M. Swetha, and N. Prathyusha. "Detection of malicious associative
affinity factor analysis for bot detection using learning automata with URL features in Twitter network." In AIP
Conference Proceedings, vol. 2548, no. 1. AIP Publishing, 2023.
Reddy, Kumbala Pradeep, K. Ruben Raju, K. Chandra Mouli, and M. Praveen. "An intelligent network intrusion
detection system for anomaly analyzer using machine learning for software defined networks." In AIP Conference
Proceedings, vol. 2548, no. 1. AIP Publishing, 2023.
Reddy, Kumbala Pradeep, G. Devi, S. Wilson Prakash, and B. Srinath. "DDOS attack detection method for SDN
by using deep neutral network." In AIP Conference Proceedings, vol. 2548, no. 1. AIP Publishing, 2023.
Devi, G., S. Wilson Prakash, and Kumbala Pradeep Reddy. "Evaluates the performance of the ensemble image
filters with classifiers on image data set using WEKA." In AIP Conference Proceedings, vol. 2548, no. 1. AIP
Publishing, 2023.
Reddy, Kallem Niranjan, and Pappu Venkata Yasoda Jayasree. "Low Power Strain and Dimension Aware SRAM
Cell Design Using a New Tunnel FET and Domino Independent Logic." International Journal of Intelligent
Engineering & Systems 11, no. 4 (2018).
Reddy, K. Niranjan, and P. V. Y. Jayasree. "Design of a Dual Doping Less Double Gate Tfet and Its Material
Optimization Analysis on a 6t Sram Cells."
Reddy, K. Niranjan, and P. V. Y. Jayasree. "Low power process, voltage, and temperature (PVT) variations aware
improved tunnel FET on 6T SRAM cells." Sustainable Computing: Informatics and Systems 21 (2019): 143-153.
Reddy, K. Niranjan, and P. V. Y. Jayasree. "Survey on improvement of PVT aware variations in tunnel FET on
SRAM cells." In 2017 International Conference on Current Trends in Computer, Electrical, Electronics and
Communication (CTCEEC), pp. 703-705. IEEE, 2017
Radha Krishna Karne and Dr. T. K. Sreeja (2022), A Novel Approach for Dynamic Stable Clustering in VANET
Using Deep Learning (LSTM) Model. IJEER 10(4), 1092-1098. DOI: 10.37391/IJEER.100454.
Karne, R. K. ., & Sreeja, T. K. . (2023). PMLC- Predictions of Mobility and Transmission in a Lane-Based Cluster
VANET Validated on Machine Learning. International Journal on Recent and Innovation Trends in Computing and
Communication, 11(5s), 477–483. https://doi.org/10.17762/ijritcc.v11i5s.7109
R. Mohandas, N. Sivapriya, A. S. Rao, K. Radhakrishna and M. B. Sahaai, "Development of Machine Learning
Framework for the Protection of IoT Devices," 2023 7th International Conference on Computing Methodologies and
Communication (ICCMC), Erode, India, 2023, pp. 1394-1398, doi: 10.1109/ICCMC56507.2023.10083950.