Error Resilience in LFSR-Based Ternary Content-Addressable Memory on FPGAs for Packet Classification in SDN and OpenFlow

Main Article Content

Edukondalu Duggeboina, Pitta Satya Surekha, Kandukuri Srinivas

Abstract

Ternary Content-Addressable Memory (TCAM) based on Linear Feedback Shift Registers (LFSR) serves a crucial role in packet classification for Software-Defined Networking (SDN) and OpenFlow applications on Field-Programmable Gate Arrays (FPGAs). The design of TCAMs on FPGAs predominantly relies on SRAMs to implement TCAM contents. However, SRAMs are susceptible to soft errors, posing a significant challenge in safeguarding LFSR-based TCAMs without compromising critical path delays or impeding search performance. This extension introduces a cost-effective and swift technique for fortifying LFSR-based TCAMs against soft errors. The approach employs straightforward single-bit parity for fault detection, introducing minimal overhead to the critical path. It leverages the binary-encoded TCAM table used for updates in LFSR-based TCAMs to establish a low-response-time error-correction mechanism at minimal cost. Importantly, the error-correction process operates concurrently with lookup operations, thereby preserving high search performance.

Downloads

Download data is not yet available.

Metrics

Metrics Loading ...

Article Details

How to Cite
Edukondalu Duggeboina, Pitta Satya Surekha, Kandukuri Srinivas. (2023). Error Resilience in LFSR-Based Ternary Content-Addressable Memory on FPGAs for Packet Classification in SDN and OpenFlow. Turkish Journal of Computer and Mathematics Education (TURCOMAT), 11(3), 2415–2424. https://doi.org/10.17762/turcomat.v11i3.14204
Section
Research Articles