Design and Optimization of a FPGA Area Efficient Present Cryptographic Architecture for IoT Node

Abstract

Lightweight symmetric cyphers are crucial for securing constrained computing networks like the Internet of Things and wireless sensor networks. Traditional cryptographic algorithms are quite resource-intensive. IoT does not make use of these kinds of algorithms. Traditional cryptographic algorithms have to worry about the limited environment and the key size since they increase the complexity of the method. The data is hacked during the wireless transmission from one device to another. The LCS-PRESENT architecture suggested in this study is a mix of the LCS circuit and the PRESENT block. Utilisations of FPGA, including Lookup Tables (LUTs), flip-flops, slices, and frequency, are used in the assessment of the architecture's performance. Using a lookup table, we may construct the key module with less space requirements. By encrypting and decrypting an LCS-PRESENT block, the XILINX tool may be used to assess the security of a system. This study uses a hardware-level encryption technique with an 80-bit key for 64-bit input data. The primary actions of the PRESENT block are key rotation and key replacement. In order to encrypt a picture, it is necessary to switch keys, rotate keys, and generate a digital-based key for use in key rotation and replacement. It provides a lot of protection against threats, so your data is safer. In this study, we employ the Xilinx 14.2 ISE tool, the Verilog HDL programming language, and the FPGA tool to create the LCS-PRESENT architecture. This tool is used to evaluate the efficiency and precision of a building's design. Performance metrics for LUTs, flip-flops, and slices are compared to those of standard, cryptographic methods. Existing and prospective designs' FPGA performances are compared..