VLSI implementation of Kogge Stone Adder Using ZFC for high speed and low area applications
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Abstract
Adder is most important component in digital circuit designs and processors. To improve the performance of digital system and VLSI systems adder is the main component. Ripple carry adder and carry look ahead adder are the conventional methods which are studied in detail manner. By using two N-bit numbers addition operation is performed using ripple carry adder. But the main dis-advantage of the ripple carry adder is when performing the addition operation for some time carry bits have to wait. Because of this delay will be increased. To overcome this kogge stone adder using ZFC logic is introduced. From parallel prefix adder, kogge stone adder is obtained. Therefore in the high performance applications kogge stone adder is most widely used. To occupy less area and to get low delay all the carries are computed in parallel form
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