1.
A.V.S.S.VARMA, DHANYA.M.K. DESIGN A LOW-LATENCY NOVEL FPGA BASED SIGNED MULTIPLIER FOR COMMUNICATION APPLICATIONS. TURCOMAT [Internet]. 2022Jan.8 [cited 2024Dec.3];12(12):4812-8. Available from: https://turcomat.org/index.php/turkbilmat/article/view/11939