R. BHEEMA SANKARAM, GUTHULA SAILAKSHMI. DESIGN AND IMPLEMENTATION OF A HIGH SPEED AND AREA EFFICIENT VLSI ARCHITECTURE OF BINARY ADDER. Turkish Journal of Computer and Mathematics Education (TURCOMAT), [S. l.], v. 12, n. 12, p. 4819–4825, 2022. DOI: 10.17762/turcomat.v12i12.11941. Disponível em: https://turcomat.org/index.php/turkbilmat/article/view/11941. Acesso em: 5 may. 2024.