A.V.S.S.VARMA, DHANYA.M.K. DESIGN A LOW-LATENCY NOVEL FPGA BASED SIGNED MULTIPLIER FOR COMMUNICATION APPLICATIONS. Turkish Journal of Computer and Mathematics Education (TURCOMAT), [S. l.], v. 12, n. 12, p. 4812–4818, 2022. DOI: 10.17762/turcomat.v12i12.11939. Disponível em: https://turcomat.org/index.php/turkbilmat/article/view/11939. Acesso em: 3 dec. 2024.