VISHWANATH, G. . Optimized Counter Design for Accelerated Summation in Digital Signal Processing Systems. Turkish Journal of Computer and Mathematics Education (TURCOMAT), [S. l.], v. 11, n. 3, p. 2620–2632, 2020. DOI: 10.61841/turcomat.v11i3.14427. Disponível em: https://turcomat.org/index.php/turkbilmat/article/view/14427. Acesso em: 2 jun. 2025.